1. Field of the Invention
The present invention relates to an image sensor and a sensing method thereof and, more specifically, to an image sensor that improves the characteristics of a transfer transistor used during reset and transfer operations of a photodiode, and a sensing method thereof.
The present invention is based on research that has been conducted as part of the Essential Technology Development Enterprise for IT New Growth Power for the Ministry Information and Communication (Republic of Korea) and Institute for Information Technology Advancement (Republic of Korea) [Subject Administration No. 2005-S-017-02, Subject Name: Integrated Development of UltraLow Power RF/HW/SW SoC].
2. Discussion of Related Art
Image sensors may be largely divided into charge-coupled device (CCD) sensors and complementary metal-oxide-semiconductor (CMOS) sensors. Both the CCD sensors and CMOS sensors operate using electron-hole pairs generated by light having a higher energy than a silicon band-gap. In this case, a technique for estimating the quantity of light irradiated by collecting electrons or holes is being employed.
In a CMOS image sensor, each image pixel includes a photodiode and a transistor similar to a typical CMOS device, so that conventional CMOS semiconductor fabrication processes can be used without changes. Therefore, as compared with a CCD image sensor that requires an additional chip having an image signal processor, the CMOS image sensor may integrally integrate an image signal processing circuit and an image detection circuit in a block outside a pixel, operate at a low voltage, and be fabricated at low cost.
Conventional CMOS image sensors may be classified into a 4-transistor pixel structure and a 3-transistor pixel structure according to the number of transistors forming a single pixel. The 3-transistor pixel structure is better than the 4-transistor pixel structure in terms of a fill factor and fabrication cost. However, the 4-transistor pixel structure is typically used because a light receiving unit, except for a surface thereof, is separated from a light detection unit and formed by a silicon bulk so that the 4-transistor pixel structure is highly responsive and sensitive to light and highly resistant to dark current and noise.
A conventional 4-transistor CMOS image sensor is illustrated in FIG. 1. In the 4-transistor CMOS image sensor, a unit pixel includes a photodiode PD, which is a light sensor, and four NMOS transistors, namely, a transfer transistor Tx, a reset transistor Rx, a drive transistor Dx, and a switch transistor Sx. The transfer transistor Tx transfers photocharges generated by the photodiode PD to a diffusion node region FD. The reset transistor Rx discharges charges stored in the diffusion node region FD or the photodiode PD in order to detect signals. The drive transistor Dx functions as a source follower transistor, and the switch transistor Sx is used for switching and addressing operations.
The photodiode PD and a capacitor 118, which are connected in parallel, constitute a light receiving unit, and the transfer transistor Tx transfers electrons generated due to photons to a diffusion node 131. In order to obtain a 2-dimensional image, a voltage is applied through a gate 141 of the switch transistor Sx to select one column. In particular, each pixel is biased by a current source 150, which operates the drive transistor Dx and the switch transistor Sx so as to read the voltage of the diffusion node 131 via an output node 142.
FIG. 2A is a cross-sectional view of a photodiode region and a transfer transistor including a diffusion node of a conventional 4-transistor CMOS image sensor. An n-doping region 202 having a specific concentration and a p+ region 203 used for surface pinning are formed in a p-type substrate 201 and constitute a photodiode, which is a light receiving device. Also, a gate insulating layer 205, a gate electrode material 206, a control line 210, and a sidewall insulating layer 207 are formed on the p-type substrate 201 and constitute a transfer transistor, which is used to reset an n-doping region 202 where photocharges are generated and accumulated, and transfer the photocharges. In this case, a diffusion node 204a and 204b, which is used to convert photocharges into a voltage, may include a diffusion region 204a so that the diffusion node 204a and 204b can be self-aligned with the gate electrode material 204 of the transfer transistor. Here, the diffusion region 204a may be formed by doping n-type impurities before forming the sidewall insulating layer 207.
FIG. 2B is a timing diagram illustrating a method of driving transfer and reset transistors Tx and Rx to perform reset and transfer operations of a photodiode in a conventional 4-transistor image sensor. Typically, a power supply voltage Vdd is used to turn on the transfer and reset transistors Tx and Rx, and a ground voltage is used to turn off the transfer and reset transistors Tx and Rx. When the reset transistor Rx is turned on (i.e., a period 231), during a turning-on period 232 of the transfer transistor Tx, a low impedance is maintained between the photodiode and a drain of the reset transistor Rx, so that charges accumulated in the photodiode are emitted out of a pixel to reset the photodiode. After resetting the photodiode, a diffusion node is reset during a turning-on period 235 of the reset transistor Rx. Thus, the voltage of the diffusion node is clamped at a voltage obtained by subtracting a subthreshold voltage Vth of the reset transistor Rx from the power supply voltage Vdd. After finishing the reset of the photodiode (i.e., the period 232), photocharges are accumulated in the photodiode during an integration time 236 in which the photodiode receives light to generate and accumulate photocharges, transferred to the diffusion node constituting a source follower during a turning-on period 233 of the transfer transistor Tx, and finally applied as a voltage to an external circuit. In this case, the intensity of light is detected by a voltage drop of the diffusion node measured at an output node after the transfer period 233 of the photocharges based on the voltage of the diffusion node measured at the output node after the reset period 235 of the diffusion node.
Therefore, the 4-transistor pixel CMOS image sensor transfers photogenerated carriers, which are accumulated in the photodiode after the reset period of the photodiode, to a floating diffusion node so that the amount of the photogenerated carriers is detected by the voltage drop of the diffusion node. In this case, the transfer transistor should perform constant, uniform reset and transfer operations in order to precisely and uniformly detect the amount of the accumulated photogenerated carriers.
Conventional 4-transistor pixels having various structures, for example, a complete-reset pinned photodiode, have been disclosed to allow a transfer transistor to perform constant reset and transfer operations. The complete-reset pinned photodiode refers to a photodiode in which all mobile charges accumulated therein are completely depleted during the reset of the photodiode and no further change in voltage occurs. In this case, the voltage of a photodiode is ideally always pinned at a constant voltage irrespective of external bias environment, such as the voltage of a floating diffusion node. Thus, the transfer operation is always performed under constant reset and transfer conditions, and the reset operation is performed under the same conditions as the transfer operation.
However, the electric potential of a diffusion node has gradually decreased in order to downscale semiconductor devices and reduce power consumption. With a reduction of the electric potential of the diffusion node, when a complete-reset pinned photodiode is used, the pinning electric potential of the pinned photodiode is naturally reduced. In this case, the characteristics of a pixel, such as well capacity or the responsivity of a photodiode to light, may deteriorate and fixed pattern noise may increase. As a result, even if an operating voltage is reduced, there is a specific limit to reducing the pinning electric potential.
When employing an incomplete-reset pinned photodiode in which mobile charges remain after reset and transfer operations of the photodiode, charges are emitted from the diffusion node to a channel region of the transfer transistor so that reset and transfer conditions of the photodiode are changed, a dark current characteristic and a fixed pattern noise characteristic are degraded, and the characteristics of an image sensor becomes very sensitive to process variables.
Above all, irrespective of whether a photodiode is a complete-reset pinned photodiode or an incomplete-reset pinned photodiode, although a power supply voltage Vdd decreases, the concentration of the p+ region 203 (refer to FIG. 2A) for surface pinning of the photodiode cannot be reduced. Because of the p+ region 203 formed in an upper portion of the photodiode, a predetermined potential barrier is necessarily present between the n-doping region 202 (refer to FIG. 2A) in which photocharges are generated and accumulated, and the channel region of the transfer transistor. In this case, when the power supply voltage Vdd decreases, the potential barrier causes a more serious problem.
When the potential barrier is not sufficiently reduced, even if the pinning voltage of the photodiode is very low, the photodiode is not completely reset, and the amount of charges remaining in the photodiode is determined by the potential barrier during a transfer operation, thereby degrading the photocharge transfer efficiency of the transfer transistor. Furthermore, the influence of the potential barrier on the transfer operation depends on the amount of photocharges accumulated in the photodiode, thereby causing an image lag.